How to analyze the status of I2C Bus for linux build.

I2C SCL state
RESET� Bus idle; the start condition has not yet been detected.
NOT MASTER � This occurs when the I2C controller detects that another master is trying to control the bus.
This is usually the Error state, because the MSM? has only one master. It is manifested as an arbitration lost error.
HIGH � High phase of scl_out
STOP condition � Master releases control of bus and returns to the Reset state
Loss of arbitration � Go to the NOT MASTER state and wait for the other master to release the bus
Unexpected START condition � Error status
LOW � Low phase of scl_out
If data control block is requesting this, it is entering forced Low state and waiting for data control block to return to normal operation


I2C SDA state
RESET � Reset and Wait state
Either STOP condition or bus is free to commence transmission
TX ADDR � 7-bit address has been transmitted to client
When address is issued, clock is pulled to low until it receives ACK from the client
TX DATA � Data has been issued to the bus
Same with TX ADDR, except it is not generating the START condition
RX DATA � Data received from the bus
Software can set the LAST_BYTE bit to terminate transfer


In AMSS\products\XXXX\drivers\hw\t32\XXXX\


There's hwioreg.cmm script that one can use on T32
to monitor I2C SCL and SDA state.
User can type "I2C_STATUS" on menu to monitor the i2c registers
This can be done on the fly to debug i2c bus.