[TZ] Extracting Power Collapse and Warm Boot Counters From Memory Dumps on MSM8960

Starting from 8960/TZ1.3, TZ adds additional warm boot / power collapse counters.


TZ diag area version 2
TZ Power Collapse and Warm Boot entry/exit counters can be extracted from the IMEM_A.BIN. The counters are in TZBSP diagnostics/debug area which starts at 0x2a03b000.

The counters appear at following addresses:

0x2a03b0a4 CPU0 warm boot entry counter0x2a03b0a8 CPU0 warm boot exit counter0x2a03b0ac CPU0 power collapse termination entry counter0x2a03b0b0 CPU0 power collapse termination exit counter (incremented when WFI falls through)0x2a03b0b4 CPU0 jump address to HLOS0x2a03b0b8 CPU0 jump address instruction0x2a03b0bc CPU1 warm boot entry counter0x2a03b0c0 CPU1 warm boot exit counter0x2a03b0c4 CPU1 power collapse termination entry counter0x2a03b0c8 CPU1 power collapse termination exit counter (incremented when WFI falls through)0x2a03b0cc CPU1 jump address to HLOS0x2a03b0d0 CPU1 jump address instruction Note that TZ doesn't make any difference between CPU1 cold and warm booting. That is, the first boot of CPU1 is included in the CPU1 warm boot entry/exit counters.




Besides these two counters, OEM can still check the variable in arch/arm/mach-msm/jtag.c




msm_jtag_save_cntr &


msm_jtag_restore_cntr




in the Kernel dump to see whether CPU enter/exit are matched or not, but these values in kernel side are not cache flushed.