Some MSM chips, for example MSM8960, can support two EBI channels for multiple SDRAM devices.
To maximize the EBI bus utilization in complicated concurrent applications, the bus controller can dispatch the data access to/from SDRAM devices between two EBI channels in interleaving manner.
In SDRAM driver, there is a flag to decide whether the interleaved mode is enabled or not:
[ddr_devices.c]
/*Indicates ddr is interleaved or not, TURE by default*/
boolean ddr_interleaved = TRUE;
The boot code uses the information in CDT (Configuration Data Table) for SDRAM configuration. The interleaved mode flag mentioned above could be over-ridden by CDT if a valid CDT is present in EEPROM or built in bootloader.
(*) For CDT, please refer to 80-N1218-1, DDR SDRAM HAL APIs and Customization Reference Guide
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