6/22/2012

In CATC USB analyser log file, USB reset signal is not shown during HS mode

Issue: When using Lecroy's CATC USB log analyzer, Reset signal is not shown correctly during HS mode operation.



Cause: HS mode idle signal electric characteristic is same as SE0.

If the device is being reset from a non-suspended high-speed state, then the device must wait no less than 3.0 ms and no more than 3.125 ms (TWTREV) before reverting to full-speed.

Reversion to fullspeed is accomplished by removing the high-speed termination and reconnecting the D+ pull-up
resistor.

The device samples the bus state, and checks for SE0 (reset as opposed to suspend), no less than 100 μs and no more than 875 μs (TWTRSTHS) after starting reversion to full-speed.

If SE0 (reset) is detected, then the device begins a high-speed detection handshake



Solution: Instead of reset packet, Chirp signal can be used for detecting reset signal. Because chirp signal always happen when HSUSB capable device get reset signal. So we can assume that reset signal happens when chirp packet is shown in CATC usb log file.

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