Lower SPI transaction rates supported by our driver on qualcomm msm7x30

Question: Are the lower SPI transaction rates supported by our driver and controller ?



Answer: Yes, the hardware supports the lower frequencies. The software also supports it with some modifications. Entries for the new frequencies need to be added to the file clkrgm_bsp_7630.c and enums also need to be added to new plans to the file clkrgm_bsp.h (clkrgm_spi_speed_type). And then, a clean compile needs to be done as the file clkrgm_bsp_7630.c is used by bootloader, AMSS, and Apps.



For the support of the lower frequencies, the number of retries (SPI_NUM_RETRIES) within which the SPI state should become valid should also be increased.



Eg.: If the SPI transaction should take place at a frequency of 185kHz, then this frequency should be added to the list of frequencies for SPI configurations in the file clkrgm_bsp_7630.c located at AMSS/products/7x30/core/systemdrivers/clkregim/src/common/


Here is a snippet:

[CLKRGM_SPI_SPEED_0_185_MHZ] =
{
.freq_hz = 185 * 1000,
.hal_cfg.eSource = HAL_CLK_SOURCE_TCXO,
.hal_cfg.nDivider = 1,
.hal_cfg.nM = 1,
.hal_cfg.nN = 104,
.hal_cfg.n2D = 104
},




Also, this frequency should be added to the file clkrgm_bsp.h as an enum of type clkrgm_spi_speed_type. Here is a snippet:

typedef enum
{ CLKRGM_SPI_SPEED_0_185_MHZ
CLKRGM_SPI_SPEED_10_MHZ,
CLKRGM_SPI_SPEED_26_MHZ,
CLKRGM_SPI_NUM_SPEEDS,
CLKRGM_ENUM_32BITS(SPI_SPEED)
} clkrgm_spi_speed_type;The SPI_NUM_RETRIES (defined in the driver file) should be increased to a bigger value, eg. 2000 considering the lower SPI transaction rates. #define SPI_NUM_RETRIES 2000