MSM8960 Modem restart Procedure

Normally, in the modem restart process, we have following procedure
1: Shutdown modem SW
2 Shutdown modem FW
3 Power up modem FW
4 Shutdown modem SW
Below the detail on procedure how to configure the related register in kernel and TZBSP side.

A. Modem SW Shutdown
1. Halt AXI bus port
2. Invoke TZ Modem SW Teardown routine (Refer to Heading B. below)
3. Disable Modem SW Voltage Regulator
4. Remove (cancel) MSM XO votes
B. TZ Modem SW Shutdown
1. Put Q6SW in reset. Keep SS ON since we still need to access SS registers. Set SW_QDSP6SS_RESET = 0x1E
2. Delay 2 microseconds for reset to propagate
3. Clamp I/O
4. Disable Q6SW core clock
5. Turn off memory footswitches
6. Put Q6SW SS into reset. Set SS bit to 1 in SW_QDSP6SS_RESET register
7. Disable MSS Q6SW AXI clock
C. Modem FW Shutdown
1. Halt AXI bus port
2. Invoke TZ Modem FW Teardown routine (Refer to Heading D below)
3. Disable Modem FW Voltage Regulator
4. Remove (cancel) MSM XO votes
D. TZ Modem FW Shutdown
1. Put Q6FW in reset. Keep SS ON since we still need to access SS registers. Set FW_QDSP6SS_RESET = 0x1E
2. Delay 2 microseconds for reset to propagate
3. Clamp I/O
4. Disable Q6FW core clock
5. Turn off memory footswitches
6. Put Q6FW SS into reset. Set SS bit to 1 in FW_QDSP6SS_RESET register
7. Disable MSS Q6FW AXI clock
8. Disable MSS clocks
a. Put MSS into reset. Set ASYNC_RESET=1 in MSS_RESET register
b. Disable MSS sleep clock
c. Disable MSS slave AHB clock
d. Disable SFAB MSS slave AHB clock
e. Disable SFAB MSS master AXI clock
E. Modem FW Powerup sequence
1. Vote with RPM to turn on MSM XO
a. Schedule a Timer (40sec) at expiry of which cancel the XO vote
2. Set Modem voltage regulator's Min and Max Voltage to 1.05 V
3. Set Modem voltage regulator's optimum operating mode (load current= .1 amps)
4. Enable Modem FW voltage regulator(LDO28)
5. Unhalt AXI bus port
6. Call into TZ to authenticate and Reset Modem FW (Heading F. below)
F. TZ Modem FW Powerup
1. Authenticate Modem FW image
2. Clock Setup for Modem Firmware
a. If not configured already, configure and enable PLL6 @ 460.8MHz non-FSM mode
b. Setup MSS Clocks (Refer Heading G. below)
c. Enable MSS Q6FW AXI clock
d. Bring Q6FW SS out of reset (FW_QDSP6SS_RESET = 0x1E)
e. Program Q6 GFMUX - input A
f. Delay 2 microseconds for reset to propagate
g. Disable core clock
The reason for enabling clock in step 2c and then disabling it in this step is to make sure Q6 reset propagates to the core before we enable footswitch settings
h. Enable memory footswitch settings (FW_QDSP6SS_PWR_CTL = 0x7F)
i. Delay 2 microseconds.
j. Enable core clock (FW_QDSP6SS_GFMUX_CTL, CLK_ENA = 1)
k. Un-clamp I/O (FW_QDSP6SS_PWR_CTL, CLAMP_IO = 0)
l. Delay 5 microseconds for the rail to charge
m. Clear all the bits, except STOP_CORE. STOP_CORE will be cleared after boot address is programmed. (FW_QDSP6SS_RESET = 0x10)
n. Enable MSS Q6FW JTAG clock (MSS_Q6FW_JTAG_CLK_CTL)
3. Program the reset address
a. FW_QDSP6SS_RST_EVB = 0x08D40000
b. FW_QDSP6SS_STRAP_TCM = FW_MODEM_STRAP_TCM_BASE);
c. FW_QDSP6SS_STRAP_AHB = FW_MODEM_STRAP_AHB_UPPER | FW_MODEM_STRAP_AHB_LOWER
4. Clock Enable for Modem Firmware (take Modem FW out of reset)
a. FW_QDSP6SS_RESET set STOP_CORE to 0
G. MSS Clock Setup
1. Enable SFAB MSS master AXI clock
2. Enable SFAB MSS slave AHB clock
3. Enable MSS slave AHB clock
4. Enable MSS sleep clock
5. Bring MSS out of reset since we have to set Q6 bus clocks that are inside MSS. MSS_RESET, ASYNC_RESET set to 0
6. Wait 2 microseconds
7. Set MSS bus frequency to 19.2MHz (using XO source)
8. Trigger DIV update (MSS_CLK_BUS_TRIG, 0x1)
9. Delay 5 microseconds
10. Check to make sure update is taking place
while ((HWIO_IN(MSS_CLK_BUS_STATUS) & 0x1) != 0);
11. Select XO source (MSS_CLK_BUS_CFG, set SRC_MUX_SEL=0)
12. Delay 2 microseconds
13. Enable AHB, AXI Slave clocks of the Q6FW and also Q6SW AHB clock
14. Enable TCXO clock to Q6 and rest of the system.
15. Delay 2 microseconds
H. Modem SW Powerup sequence
1. Vote with RPM to turn on MSM XO
a. Schedules a Timer (40sec) that cancels the XO vote
2. Set Modem voltage regulator's Min and Max Voltage to 1.05 V
3. Set Modem voltage regulator's optimum operating mode (load current= .1amps)
4. Enable Modem SW voltage regulator (LDO27)
5. Unhalt AXI bus port
6. Call into TZ to authenticate and Reset Modem SW (Refer to heading I. below)
I. TZ Modem SW Powerup
1. Authenticate Modem SW image
2. Clock Setup for Modem Firmware
a. Enable MSS Q6SW AXI clock
b. Bring Q6SW SS out of reset (SW_QDSP6SS_RESET, 0x1E)
c. Configure Q6SW GFMUX - input A
d. Delay 2 microseconds for reset to propagate
e. Disable core clock - The reason for enabling clock in step a and disabling it in this step is to make sure Q6 reset propagates to the core before we enable footswitch settings
f. Enable memory footswitch settings (SW_QDSP6SS_PWR_CTL, 0x7F)
g. Delay 2 microseconds
h. Enable core clock (SW_QDSP6SS_GFMUX_CTL, CLK_ENA, 1)
i. Un-clamp I/O (SW_QDSP6SS_PWR_CTL, CLAMP_IO, 0)
j. Delay 5 microseconds for the rail to charge
k. Clear all the bits, except STOP_CORE. STOP_CORE will be cleared after boot address is programmed SW_QDSP6SS_RESET = 0x10
l. Enable MSS Q6SW JTAG clock (MSS_Q6SW_JTAG_CLK_CTL)
m. Enable Q6SW AXIS_CLK
3. Program Reset Address
a. SW_QDSP6SS_RST_EVB =0x08900000
b. SW_QDSP6SS_STRAP_TCM = SW_MODEM_STRAP_TCM_BASE;
c. SW_QDSP6SS_STRAP_AHB = SW_MODEM_STRAP_AHB_UPPER | SW_MODEM_STRAP_AHB_LOWER);
4. Clock Enable for Q6SW. Bring Q6SW core out of reset SW_QDSP6SS_RESET, STOP_CORE set to 0
5. Delay 5 microseconds for Q6 SW to come out of reset
6. Enable HW gating for Q6SW AXIS_CLK (SW_QDSP6SS_CGC_OVERRIDE set AXIS_ACLK_EN to 0)