A easy way to invert the polarity of MDP Pixel clock output signal

There are some requests from customer to invert the polarity of Pixel clock signal due to their lcd panel IC specific design.

some customer want the RGB data ready in the falling edge of PCLK for their specific panel, otherwise poor display quality may be caused.
In our Msm7x27/7x30/8x55 chip, the RGB data is output in the raising edge of PCK by default , but we can invert the polarity of PCK to make it works on customer's lcd panel.

In theory, we can set the invert bit in register (0x003B0 MDP_LCDC_NS_REG) by:
reg_val = reg_read(MDP_LCDC_NS_REG); // 0x003B0
reg_val |= MDP_LCDC_PCLK_INV; // BIT(10)
reg_write(MDP_LCDC_NS_REG); // 0x003B0

But here we have some other simple methods:
1. in linux kernel code:
/* add the code below after calling clk_set_rate() */
+ #define CLKF_INVERT 0x00000001
+ #define CLKF_NOINVERT 0x00000002
+ clk_set_flags(pixel_mdp_clk, CLKF_INVERT);

2. in appboot stage, lk code:
// add the code below in \\bootable\bootloader\lk\platform\msm_shared\proc_comm.c */
+static int clk_set_flags(unsigned id, unsigned flags)
+{
+ return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
+}

/* add the code below after calling clk_set_rate() */
+ #define CLKF_INVERT 0x00000001
+ #define CLKF_NOINVERT 0x00000002
+ clk_set_flags(MDP_LCDC_PCLK_CLK, CLKF_INVERT);

3. in amss modem code:
/* add the code below after calling clk_regime_msm_config_clk(), in
void clk_regime_msm_init_clocks() or uint32 clk_regime_sel_mdp_lcdc_clk() */
*/
+ clk_regime_msm_sel_clk_inv(CLKRGM_MDP_LCDC_PCLK_CLK, TRUE);